makefile

g++ header included: still doesn't find definition

Good evening :) I'm playing around with g++ and makefiles. I've gotten to this point: foo.h: #ifndef _FOO_H_ #define _FOO_H_ #include "bar.h" class foo { private: bar something; public: bool start(); bool stop(); }; #endif // _FOO_H_ Foo.h is eventually included in my main cpp file so I can set things in motion by cal...

Can a makefile update the calling environment?

Is it possible to update the environment from a makefile? I want to be able to create a target to set the client environment variables for them. Something like this: AXIS2_HOME ?= /usr/local/axis2-1.4.1 JAVA_HOME ?= /usr/java/latest CLASSPATH := foo foo setenv: export AXIS2_HOME export JAVA_HOME export CLASSPATH So that...

Best practices for a C++ portable opensource application

I am starting an open source cross platform project in C++. My development environment is Linux. There may be other developers who develop from different platforms as well. So I need some help in getting started with the configuration and development environment setup, so that all developers from multiple platforms can develop easily. ...

(avr-gcc) Makefile support for sub-directories

Hi; I am working on an AVR project and have multiple folders containing my code. The makefile I am using is the "Standardized AVR Makefile Template" by Pat Deegan. It's capable of compiling every cpp file in every folder correctly and generate the right object (.o) files. However, the linker fails because it try to find to .o files i...

Creating nested makefile

I am learning makefiles and I know how to create a simple makefile. I am moving on to nested makefiles. Here is my directory structure /src ...makefile ...main.cpp ...foo ......makefile ......foo.cpp ......foo.h When root makefile is called, it calls the makefile in directory foo. Here are my questions Which makefile should I use to...

Howto incorporate -I in makefile

Dear all, I have no problem compiling specific code the following way: g++ -I /opt/local/include Code1.cc -o Code1 However when I tried to do that in the makefile: CXX = g++ -Wall -Werror -gstabs -pedantic -O2 -g all: Code3 Code2 Code1 Code3: Code3.cc Tools.cc $(CXX) $^ -o $@ Code2: Code2.cc Tools.cc $(CXX) $^ -o $@ ...

How to efficiently "make" with Vim

Hi, what I am triing to do seems a very basic stuff, but I can't find anything about it. I am working on a project built as usual: project |-- bin |-- inc `-- src I would like to make my project using the make command included in Vim. But each time I have to specify :make -C ../. I would prefer, if there is not Makefile file in the c...

Is there any material about makefile in Windows?

Is there any difference between makefile in Windows and Linux? If I know how to use it in Linux, is it necessary to learn something new when in Windows system? ...

CMake, Xcode and Unix Makefile

I was using classic Unix Makefile generator until I found a webpage explaining CMake could produce a nice xcode project file using "cmake -G Xcode" so I ran that command in my source directory and I get a nice xcode project. This is great but I'm facing some drawback and was wondering if there are solutions to these : now I can't build...

Syntax error : end of file unexpected (expecting "fi")

I am writing a makefile in bash and I have a target in which I try to find if a file exists and even though I think the syntax is correct, i still gives me an error. Here is the script that I am trying to run read: if [ -e testFile] ; then \ cat testFile\ fi I am using tabs so that is not a problem. The...

Object files generation and best practices for linking using makefiles - C++

Background I am just getting started with C++ programming on LINUX. In my last question, I asked about best practices of using makefiles for a big application. "SO" users suggested to read Miller's paper on recursive makefiles and avoid makefile recursion (I was using recursive makefiles). I have followed miller and created a makefile...

Colon and $ in makefile

What does TEMP0_FILES below compute to? SOURCE_FILES can equal to multiple source files. Please tell me the purpose of the following syntax :.cpp=.o SOURCE_FILES = main.cpp TEMP0_FILES = $(SOURCE_FILES:.cpp=.o) ...

makefile not building updated part of the program - C++

I am new to makefiles and facing some issue with it. I have created the following makefile. It works correctly. But when I modify the main.cpp and run make, it says "everything is up to date". I need to do a make clean and run make again, everything will work. Looks like there is some issue with this makefile and I can't figure it out ...

Debugging using gdb - Best practices

I am a beginner in GDB and I got it working correctly. However, I am wondering how this is used in big projects. I have a project where build is done using makefile and g++. For GDB to work, we need to compile with debug symbols on, right (g++ -g files)? Question Do I need to create a new target in makefile something like "debug", so...

How can I determine the project directory and other environmental variables in SunStudio?

I'm currently trying to add a post build step to a SunStudio project's build/make file, but to continue I need to know the project's directory. Problem is ${PWD} doesn't return the current directory and I can't find any environmental variable like ${PROJECTDIR} or what not. Actually in a more all encompassing way my problem is that I ca...

Simple makefile with release and debug builds - Best practices

I am new to makefiles. I learned makefile creation and other related concepts from "Managing projects with GNU make" book. The makefile is ready now and I need to make sure the one which I created is OK. Here is the makefile #Main makefile which does the build #makedepend flags DFLAGS = #Compiler flags #if mode variable is empty, set...

Help me to create a Makefile

Support you have a C program included by some files, and some one is consisted by some others, so as follows: ---------------------------------------- File | Included files ---------------------------------------- main.c | stdio.h, table.h ---------------------------------------- list.c | list.h -...

How do you force a makefile to rebuild a target

I have a makefile that builds and then calls another makefile. Since this makefile calls more makefiles that does the work it doesnt really change. Thus it keeps thinking the project is built and upto date. dnetdev11 ~ # make make: `release' is up to date. How do i force the makefile to rebuild the target? clean = $(MAKE) -f ~/xxx/x...

Compile linux kernel (2.6) module including non kernel headers

Is it possible to compile a linux kernel(2.6) module that includes functionality defined by non-kernel includes? For example: kernelmodule.h #include <linux/init.h> #include <linux/module.h> #include <linux/kernel.h> // printk() // ... #include <openssl/sha.h> // ... Makefile obj-m := kernelmodule.o all: $(MAKE) -C /lib/mo...

Automatic variables in the tests of conditionals : GNU Make

Hi, I am kind of stuck here. We have two makefiles (A requirement that I can't change) defs.mk : It contains the source file names & their extra compile flags (apart from the standard flags) e.g: C_FILES = c/src/main/rule_main.c rule_main_OPTIONAL_FLAG = +w127 rule_main_DEBUG = TRUE Makefile : It contains all the rules. Now I want t...