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153

answers:

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Hello, I've always kinda wanted to make my own microprocessor.. I've read http://stackoverflow.com/questions/632698/how-can-i-make-my-own-microcontroller .

I tried multiple times to learn some Verilog and VHDL. But for the life of me I just can not get my head around the language styles. I come from a C/C++/C# background and have dabbed some(with success) with doing functionalish programming with Ruby.

Can anyone suggest a book or online resource for teaching an HDL language from scratch(so that I can unlearn my procedural way of thinking)

Also, I am having trouble getting my head around exactly how to simulate an HDL program. There is nothing like printing or stuff in hardware, so what is the best way of testing programs without an FPGA(I'm going to order one of those sometime though!). How exactly does simulating it work?

Basically I'm just needing someone to help me get my head around HDLs and their simulation.

+2  A: 

Remember, HDLs were intended to model hardware. With hardware everything happens at once. By hardware, I mean a collection of logic gates connected to inputs and to the outputs of other logic gates in some fashion. This is essentially what an FPGA or an ASIC is (in an FPGA those connections are programmable). Wiggle an input and the effects ripple through the chain of logic gates - think of every logic gate as a little processor that's constantly evaluating it's inputs.

So in an HDL the first thing you need to consider is that all assignments are happening at the same time. The only place things happen in the "normal" sense (one statement following another as in a regular programming language) is inside of a process block (in VHDL, or an always block in Verilog). But then you have to realize that all of the process blocks (or always blocks in Verilog) are also executing concurrently.

HDLs are just trying to model the concurrency of hardware.

As far as books that try to teach HDLs to software developers... I don't think there are any. Most are aimed at Hardware Engineers.

You mentioned that you've done some Ruby programming. If you want to play with an HDL written in Ruby you can try out RHDL: http://rhdl.rubyforge.org/ The basic HDL concepts are there and it looks a lot like VHDL, but it's Ruby so you can experiment a bit more with the innards. You can write models and then simulate them. There are some examples included.

aneccodeal
I think I'll try some RHDL and see how that works..
Earlz
Ok, I think RHDL is my best bet on getting started with HDL programming.. I got the examples and such running and going through the user guide. Thanks for bringing it to my attention that RHDL exists!
Earlz
Just be careful with "The only place things happen in the "normal" sense (one statement following another as in a regular programming language) is inside of a process block (in VHDL"...Signals and variables are very different things in VHDL. Signals only get their new value at the *end* of a process, variables act like "normal" software.
Martin Thompson
Also note that RHDL doesn't allow you to do real hardware - it doesn't AFAICT have a way of outputing a VHDL/Verilog netlist.MyHDL *can* do this, if you like Python - http://www.myhdl.org/
Martin Thompson
A: 

For debugging Verilog offers printf like system tasks like $display or $monitor. These are of course not synthesizable, but every simulator should understand them. Debugging then is on the one hand done, just like SW debugging, by printing out signal values and whatever else to the console using the already mentioned $diplay and stuff. And on the other hand by staring at signal wave forms until you find the ill spot. For these things you not even need an FPGA, a good simulator is all you need. But having a FPGA to make some LEDs blink is always nice :)

For simulation you should have a look on Modelsim. If you are on windows there is a student edition available for free.
http://www.model.com/content/modelsim-pe-student-edition-hdl-simulation

Another option is Xilinx' ISE Web-Pack. This even works on linux and includes the complete FPGA flow. http://www.xilinx.com/tools/webpack.htm
But I recommend Modelsim for simulation.

Some starting points I have at hand are:
http://www.asic-world.com/
http://www.doulos.com/knowhow/verilog_designers_guide/

skorgon
+2  A: 

Debugging is done with the simulator and its waveform viewer - you can watch what all your internals are doing over time. In addition, with Modelsim you can also do software-like breakpoints inside processes.

You can print things out with VHDL using the "report" statement, but you have to do your formatting in a very non-SW way:

report "The value is not " & integer'image(some_integer_variable);

For somewhat easier printing, use the textio package.

Another tip - lots of code out there has use ieee.std_logic_arith.all; in it. That library is non-standard (despite the IEEE moniker), use ieee.numeric_std.all instead.

Start simple - create a counter which goes up by one each time the clock ticks (use the if rising_edge(clk) then idiom). When the counter gets to a particular value, toggle a signal.

Create a testbench to simulate it, which basically means just making the clk signal go '0', '1', '0', '1'.

An easy to understand way is this:

process:
begin
    clk <= '0';
    wait for 5 ns;
    clk <= '1'; 
    wait for 5 ns;
end process;

Run the sim, watch your counter go up, and the toggle signal toggle. If you make your counter big enough, you can then build an FPGA and watch an LED flash on and off by wiring up that toggle signal to an LED pin.

That's the FPGA equivalent to "Hello World"!

Martin Thompson