I want to pick up FPGA programming. I've heard all types of horror stories of proprietary tools. Is there any entirely open source tool chain available?
If not, how should I learn this? My background: familiar with scheme, c++, assembly, mips architecture.
Thanks!
I don't think there are any open source complete toolchains available. You might want to look at the Altera Web edition. A free trial download. You can use the MIPS-like Nios2 processor and program it in C and C++ (GNU toolset). There is a Linux port available also.
Icarus is an open source Verilog implementation. You will still need the tool chain from your FPGA vendor to get the code on the FPGA itself.
The gEDA project has some free EDA tools that you may want to check out. The above mentioned Icarus is part of gEDA.
Also check out Fedora Electronic Lab. This is something new to me so I can't provide more info.
While proprietary, there hasn't been an open-source toolchain since the late 90's. However both Altera and Xilinx have had their free limited version for long enought you would be safe using them.
If you wish to just learn the language, one of the tools above would work. But I would still use a real vendor's toolchain. Since you would be just writing standard Verilog or VHDL, you could take your source to another vendor, just like C.
There will likely never be a complete open source tool chain for FPGAs unless we manage to develop an open source FPGA architecture. The FPGA companies control the bitstream formats used to program their parts and they have onerous legal language in their user agreements that make it a rather dangerous proposition to try to develop open source tools by reverse engineering (nobody wants to lose their house).
The good news, though, is that many of the patents that protect FPGA architectures are expiring over the next few years. That could make it possible to develop an open source FPGA architecture. Of course, you'd need a few semiconductor companies to get on board and actually manufacture it...
As has been pointed out, there are free HDL simulation tools like Icarus Verilog and GHDL (a VHDL frontend for gcc). But all you can do with them is simulate your design to ensure that it's functionally correct. You then need some sort of synthesis tool to take your HDL to gates and eventually to the bitstream. Xilinx and Altera have free web editions of such tools, but they are definitely not open source.