No rule to make target ... libm.a
I get the following error when I try to compile my app: *** No rule to make target `/mypath/lib/libm.a', needed by `/myPath/bin/appName' Why is the linker looking for libm.a according to an absolute path? ...
I get the following error when I try to compile my app: *** No rule to make target `/mypath/lib/libm.a', needed by `/myPath/bin/appName' Why is the linker looking for libm.a according to an absolute path? ...
If foo_user.cpp depends on foo.h, then foo_user.cpp is built, and then foo.h's modification time is set to further in the past, make will not rebuild foo_user.cpp (because foo.cpp is 'newer'). I'd prefer it if make recorded the modification times of dependencies, and if they changed at all (newer or older), to consider targets of that de...
Hello, gcc 4.4.1 C99 I am creating a client server application. I have a Makefile that compiles all the files. However, I would like 2 create 2 targets (binaries) one called clt and svr. And would like the Makefile to create 2 separate directories for them, called ./client and ./server? So far I have done this to my Makefile. That on...
Google is failing me, so I decided to ask here... How can you tell, from the command line, how many cores are on the machine when you're running Mac OS X? On Linux, I use: x=$(awk '/^processor/ {++n} END {print n+1}' /proc/cpuinfo) It's not perfect, but it's close. This is intended to get fed to make, which is why it gives a result...
I have a fairly large project which uses make for its build infrastructure. When we perform a build, we take advantage of cl.exe's /showInclude option to find source dependencies. Is there a similar capability for rc.exe? The basic problem is this: A makefile specifies a resource to be compiled (say, resources.rc). The resource file...
I have a fairly large project which uses make for its build infrastructure. When we perform a build, we take advantage of cl.exe's /showInclude option to find source dependencies. Is there a similar capability for rc.exe? The basic problem is this: A makefile specifies a resource to be compiled (say, resources.rc). The resource file in...
I wonder in the installation process of configure, make, make check and make install, what does "make check" do? Thanks! ...
Just assume we are installing some libraries from its source distributed by the way GNU promoted. When using "./configure --prefix" to specify where to install. (1) does Make generate the binaries under the current directory? Does Make install then copies them from the current directory (which is from where Make is run) to $prefix? If ...
I know all about batch files and made them before, but I'm unclear on what a makefile is. It looks like a batch file. What are the similarities and diffferences? ...
When I run make all on the following Makefile I get this error: Makefile:5: *** missing separator. Stop. What's wrong with it and how do I fix it? LEX = lex YACC = yacc CC = gcc calcu: y.tab.o lex.yy.o $(CC) -o calcu y.tab.o lex.yy.o -ly -lfl y.tab.c y.tab.h: parser.y $(YACC) -d parser.y y.tab.o: y.tab.c parser.h $(CC) -c y.tab.c le...
I want to just type 'make all' and have the following Makefile do everything it's supposed to do: LEX = lex YACC = yacc CC = gcc calcu: y.tab.o lex.yy.o $(CC) -o calcu y.tab.o lex.yy.o -ly -lfl y.tab.c y.tab.h: parser.y $(YACC) -d parser.y y.tab.o: y.tab.c parser.h $(CC) -c y.tab.c lex.yy.o: y.tab.h lex.yy.c $(CC) -...
Hi. I'm working on a cross-platform 2D engine for mobile devices (Windows Mobile 6 and Android). My Windows version is pretty much ready, but I still need to make sure the same functionality is available on Android. What I want is one Makefile in the root of the project and several Makefile's for the project itself and the test applica...
Is there a command line way in make to find out which of the prerequisites of a target is not update? Thanks. ...
It always seems to pick up the version from /usr/lib and there doesn't seem to be a ./configure parameter to override it. ./configure --prefix=$PREFIX --with-quantum-depth=8 --disable-installed --without-x --without-perl --enable-static --disable-shared --with-jpeg --with-tiff CPPFLAGS="$CPPFLAGS" LDFLAGS="$LDFLAGS" CFLAGS="$CFLAGS" --d...
G'day, I'm revisiting Python after Michael Sparks's excellent walkthrough of Peter Norvig's Python spell checker at the SO DevDay in London. One of the points he highlighted was how clean Python is to look at. Not cluttered with braces for scopes but using white space to indicate block scope instead. This got me thinking. I wonder if ...
I have a makefile to build some transducers using Xerox' finite state tools (xfst in this case), which I invoke in my makefile like so (except with a hard tab instead of spaces in the actual makefile, of course): latin.fst: nouns.fst verbs.fst xfst -f build/latin.fst.build On my laptop (a Mac with OS X 10.6.2) this works just fine...
Is there a way to have make display the line number where it declares an error? The -d switch doesn't seem to cut it. Updated: Example output: Reaping winning child 0x08aa8648 PID 9381 /bin/sh: Syntax error: "then" unexpected (expecting "fi") ...
In a makefile, is there a way to "wrap" a section of shell commands in order to save on the line continuation \ all the time? updated: my main area of concern revolves around stuff like nested if blocks. @if ... \ #do stuff \ else: ; \ #do some more stuff \ @if ... \ # do more stuff ... ...
Hello! Let's assume I have directories like: dir1 main.cpp dir2 abc.cpp dir3 def.cpp dir4 ghi.cpp jkl.cpp And let's assume that main.cpp includes dir2/abc.cpp and dir3/def.cpp, def.cpp includes dir4/ghi.cpp and dir4/jkl.cpp. My question is, how can I have one Makefile/CMak...
for example I have something like this in my makefile all: cd some_directory but when I type make I saw only 'cd some_directory' like in echo command ...