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Q: 

or_reduce functionality

what is the functionality of "or_reduce" function in VHDL ?

+1  A: 

crazyscot is quite right. Here's a precis:

It takes a std_logic_vector and returns the result of using the VHDL OR operator to or all the bits together. So if there's a X, Z, U etc in the vector, you'll get the "strongest" of these back.

Martin Thompson  2010-05-17 12:23:23

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